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Internet Message Format  |  1995-09-02  |  2KB
  1. Received: by webcom.webcom.com
  2.     (1.37.109.15/16.2) id AA221555021; Wed, 9 Aug 1995 09:17:02 -0700
  3. Return-Path: <owner-lightwave@webcom.webcom.com>
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  5.     (1.37.109.15/16.2) id AA221344993; Wed, 9 Aug 1995 09:16:33 -0700
  6. Received: by mail.infinet.com (Smail3.1.28.1 #9)
  7.     id m0sgDc8-000KVoC; Wed, 9 Aug 95 12:04 EDT
  8. Date: Wed, 9 Aug 1995 12:04:14 -0400 (EDT)
  9. From: "J. David Johnson" <jdavid@infinet.com>
  10. X-Sender: jdavid@rigel
  11. To: "Aubin, Todd" <taubin@FASTech.Com>
  12. Cc: lightwave@webcom.webcom.com, Ken VanBrocklin <kvanbroc@ATK.COM>
  13. Subject: Re: Re[2]: Intel Triton Chipset?
  14. In-Reply-To: <9507098079.AA807983116@felix.fastech.com>
  15. Message-Id: <Pine.SUN.3.91.950809120146.5553B-100000@rigel>
  16. Mime-Version: 1.0
  17. Content-Type: TEXT/PLAIN; charset=US-ASCII
  18. Sender: owner-lightwave@webcom.webcom.com
  19. Precedence: bulk
  20.  
  21. On Wed, 9 Aug 1995, Aubin, Todd wrote:
  22.  
  23. > 
  24. > I am currently testing a new config for a client and this
  25. > has the ASAU P55 with the pipeline, 512k cache, and an intel 133
  26. > 
  27.  
  28. I was unaware that the Pentium's were available with a 512 Pipeline 
  29. Cache.  I was told by Treasure Chest Peripherals "leading motherboard 
  30. wholesaler" that a 512 pipeline was not "invented?" yet.
  31.  
  32. She mentioned tho that the write-back cache does go to 512.  Could you 
  33. elaborate?
  34.  
  35.  
  36. J. David - Video GT
  37.  
  38. --
  39. "J. David Johnson" <jdavid@infinet.com> sent this message.
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